一、Segment STACK ... is too long for segment definition
二、Segment RAM_CODE_FLASH is too long for segment definition.
三、Undefined external "?Vxx" referred in AF
一、Segment STACK … is too long for segment definition
Error[e16]: Segment ISTACK (size: 0xc0 align: 0) is too long for segment definition. At least 0x3 more bytes needed. The problem occurred while processing the segment placement command
打開項目設置
修改目標數值，將原有值減去剛提到的至少有的值， 我這里就是(0xc0 - 0x03 = 0xbd)
重新編譯即可， 其他類似問題，解決方案也類似。
二、Segment RAM_CODE_FLASH is too long for segment definition.
Error[e16]: Segment RAM_CODE_FLASH (size: 0x27 align: 0) is too long for segment definition. At least 0x4 more bytes needed. The problem occurred while processing the segment placement command
/**************************************************************************************************Filename: chipcon_cstartup.s51Revised: $Date: 2014-05-01 09:07:13 -0700 (Thu, 01 May 2014) $Revision: $Revision: 38324 $Description: Contains the code executed before the C/EC++ "main"function is called. The code is designed to run on anyprocessor based on the 8051 architecture.Copyright 2005-2014 Texas Instruments Incorporated. All rights reserved.IMPORTANT: Your use of this Software is limited to those specific rightsgranted under the terms of a software license agreement between the userwho downloaded the software, his/her employer (which must be your employer)and Texas Instruments Incorporated (the "License"). You may not use thisSoftware unless you agree to abide by the terms of the License. The Licenselimits your use, and you acknowledge, that the Software may not be modified,copied or distributed unless embedded on a Texas Instruments microcontrolleror used solely and exclusively in conjunction with a Texas Instruments radiofrequency transceiver, which is integrated into your product. Other than forthe foregoing purpose, you may not use, reproduce, copy, prepare derivativeworks of, modify, distribute, perform, display or sell this Software and/orits documentation for any purpose.YOU FURTHER ACKNOWLEDGE AND AGREE THAT THE SOFTWARE AND DOCUMENTATION AREPROVIDED “AS IS” WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALLTEXAS INSTRUMENTS OR ITS LICENSORS BE LIABLE OR OBLIGATED UNDER CONTRACT,NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION, BREACH OF WARRANTY, OR OTHERLEGAL EQUITABLE THEORY ANY DIRECT OR INDIRECT DAMAGES OR EXPENSESINCLUDING BUT NOT LIMITED TO ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVEOR CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF PROCUREMENTOF SUBSTITUTE GOODS, TECHNOLOGY, SERVICES, OR ANY CLAIMS BY THIRD PARTIES(INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS.Should you have any questions regarding your right to use this Software,contact Texas Instruments Incorporated at www.TI.com.
**************************************************************************************************/#include "iar_common.h"MODULE CSTARTUPFUNCTION __program_start,0203HPUBLIC __program_startEXTERN ?B0EXTERNS_FOR_ALL_DPTR_SYMBOLS()REQUIRE ?B0REQUIRE __call_main#if (__NUMBER_OF_DPTRS__ > 1)REQUIRE ?RESET_DPS
#endif#if (__CORE__ == __CORE_EXTENDED1__)REQUIRE __call_init_extended1
#endif#if (__CORE__ == __CORE_EXTENDED2__)REQUIRE __call_init_extended2
#endif; Uncomment this when rom-monitor requires 3 NOPS between statements.; REQUIRE ?ROM_MONITOR_NOPSRSEG REGISTERS:NOROOT:DATAPUBLIC ?REGISTERS?REGISTERS://------------------------------------------------------------------------
// The C stack segment. Should be mapped into internal data RAM
//
// ISTACK: Should be mapped into internal data RAM
// PSTACK: Should be mapped into external data RAM page
// XSTACK: Should be mapped into external data RAM
// EXT_STACK: Should be mapped into external data RAM
//
//------------------------------------------------------------------------
// The C stack is used for LCALL's and temporary storage for
// code generator help-routines (math etc). The stack will be
// located after all other internal RAM variables if the stan-
// dard linking procedure is followed. Note that C interrupt
// routines can double stack size demands.
//
//------------------------------------------------------------------------RSEG ISTACK:NOROOT:IDATAPUBLIC ?ISTACK_START
?ISTACK_START:RSEG PSTACK:NOROOT:XDATAPUBLIC ?PSTACK_START
?PSTACK_START:RSEG XSTACK:NOROOT:XDATAPUBLIC ?XSTACK_START
?XSTACK_START:RSEG EXT_STACK:NOROOT:XDATAPUBLIC ?EXT_STACK_START
?EXT_STACK_START://------------------------------------------------------------------------
//
// Define reset vector.
//
//------------------------------------------------------------------------COMMON INTVEC:CODE:ROOT(0)// The reset vector must be located at address zero, the reset
// vector is located first in the INTVEC segment. This segment
// must thus be located at address zero. Be carefull if using
// assembler sequences located with the ASEG directive, which may
// prevent the INTVEC segment from being located at address zero.// Not enforcing location at address 0 for boot loader for OAD.
// LIMIT SFB(INTVEC),0,0,"The INTVEC segment must begin at address zero"?reset_vector:DB 0x02 ; LJMP
#if defined(START_INIT_IN_FAR)DB BYTE3(__program_start)
#endifDB high(__program_start)DB low(__program_start)//------------------------------------------------------------------------
//
// Initialize the chip to suit IAR ICC8051 Compiler
//
//------------------------------------------------------------------------RSEG CSTART:CODE:ROOTEXTERN ?REGISTER_BANKREQUIRE ?REGISTERSREQUIRE ?reset_vector__program_start:MOV PSW,#(?REGISTER_BANK << 3)//------------------------------------------------------------------------
//
// Initialize the extended1 core
//
//------------------------------------------------------------------------#if (__CORE__ == __CORE_EXTENDED1__)REQUIRE __call_init_extended1RSEG CSTART:CODE:NOROOTPUBLIC __call_init_extended1EXTERN __init_extended1__call_init_extended1:DB 0x12 ; LCALL
#if defined(START_INIT_IN_FAR) DB BYTE3(__init_extended1)
#endifDB high(__init_extended1)DB low(__init_extended1)
#endif//------------------------------------------------------------------------
//
// Reset of bank registers and stack pointers
// ==========================================
//
// ?RESET_SP: Resets the IDATA stack pointer
// ?RESET_ESP: Resets the extended stack pointer
// ?RESET_PSP: Resets the PDATA stack pointer
// ?RESET_XSP: Resets the XDATA stack pointer
//
// ?RESET_CODE_BANK: Resets the current code bank register
// ?RESET_PDATA_BANK: Resets the high byte of PDATA page register
//
// ?RESET_DPS: Resets the DPTR selector (point at DPTR0)
//
//------------------------------------------------------------------------//------------------------------------------------------------------------
//
// Reset idata or extended stack pointer
// extended stack pointer if the extended stack is used
// otherwise, the ordinary stack pointer
//
//------------------------------------------------------------------------#if (defined(__EXTENDED_STACK__) )//
// Reset extended stack pointer
//PUBLIC ?RESET_ESPREQUIRE ?EXT_STACK_STARTEXTERN ?ESP?RESET_ESP:MOV SP,#low(sfb(EXT_STACK))MOV ?ESP,#high(sfb(EXT_STACK))
#else//
// Reset idata stack pointer
//PUBLIC ?RESET_SPREQUIRE ?ISTACK_START?RESET_SP:MOV SP,#SFB(ISTACK)-1
#endif//------------------------------------------------------------------------
//
// Reset pdata stack pointer
//
//------------------------------------------------------------------------RSEG CSTART:CODE:NOROOTPUBLIC ?RESET_PSPEXTERN ?PSPREQUIRE ?PSTACK_STARTREQUIRE ?RESET_PDATA_BANKEXTERN ?PSTACK?RESET_PSP:MOV ?PSP,#low(sfe(PSTACK))//------------------------------------------------------------------------
//
// Reset xdata stack pointer
//
//------------------------------------------------------------------------RSEG CSTART:CODE:NOROOTPUBLIC ?RESET_XSPEXTERN ?XSPREQUIRE ?XSTACK_STARTEXTERN ?XSTACK?RESET_XSP:MOV ?XSP,#low(sfe(XSTACK))MOV ?XSP+1,#high(sfe(XSTACK))//------------------------------------------------------------------------
//
// Reset code bank
//
//------------------------------------------------------------------------#if ( (__CODE_MODEL__ == __CM_BANKED__) || ( __CODE_MODEL__ == __CM_NEAR__ ) )RSEG CSTART:CODE:NOROOTPUBLIC ?RESET_CODE_BANKEXTERN ?CBANK?RESET_CODE_BANK:NOP
// MOV ?CBANK,#0x00
#endif//------------------------------------------------------------------------
//
// Reset pdata page
//
//------------------------------------------------------------------------RSEG CSTART:CODE:NOROOTPUBLIC ?RESET_PDATA_BANKEXTERN ?PBANKEXTERN ?PBANK_NUMBER?RESET_PDATA_BANK:MOV ?PBANK,#?PBANK_NUMBER
#if (defined ( __EXTENDED_DPTR__))EXTERN ?PBANK_EXT?RESET_PDATA_BANK_EXT:MOV ?PBANK_EXT,#0x00
#endif//------------------------------------------------------------------------
//
// Reset data pointer select register
//
//------------------------------------------------------------------------#if (__NUMBER_OF_DPTRS__ > 1)RSEG CSTART:CODE:NOROOTPUBLIC ?RESET_DPSEXTERN ?DPS?RESET_DPS:MOV ?DPS,#0x00#endif//------------------------------------------------------------------------
//
// Initialize the extended1 core
//
//------------------------------------------------------------------------#if (__CORE__ == __CORE_EXTENDED2__)REQUIRE __call_init_extended2RSEG CSTART:CODE:NOROOTPUBLIC __call_init_extended2PUBLIC ?MEX1PUBLIC ?MEX2PUBLIC ?MEX3PUBLIC ?MEXSPEXTERN __init_extended2
?MEX1 EQU 0x94
?MEX2 EQU 0x95
?MEX3 EQU 0x96
?MEXSP EQU 0x97
__call_init_extended2:;; MEX1 = 0x00 at resetORL ?MEX1, #(BYTE3(__init_extended2) & 0x0F) LCALL __init_extended2 & 0x00FFFF
#endif//------------------------------------------------------------------------
//
// Disable the PFLASH cache in Infineon devices that have the hardware
// bug.
//
//------------------------------------------------------------------------RSEG CSTART:CODE:NOROOTPUBLIC __disable_infineon_pflash__disable_infineon_pflash:DB 0x12 ; LCALL
#if defined(START_INIT_IN_FAR)DB 0x00
#endifDB 0xDFDB 0xFC//------------------------------------------------------------------------
//
// Jump to the code that performs the rest of the system initialization
// before calling main().
//
//------------------------------------------------------------------------RSEG CSTART:CODE:NOROOTEXTERN ?cmain__call_main:LJMP ?cmainENDMOD __program_start;----------------------------------------------------------------;
; Virtual registers ;
; ================= ;
; Below is some segment needed for the IAR ICC C/EC++ compiler ;
; ;
; BREG : A segment for 8 bit registers for use by the compiler. ;
; ?B0 is the first register. ;
; VREG : Segment that holds up to 32 virtual registers for ;
; use by the compiler. ?V0 is the first register. ;
; PSP : Segment containing the PDATA stack pointer (?PSP) ;
; XSP : Segment containing the XDATA stack pointer (?XSP) ;
; ;
;----------------------------------------------------------------;
;----------------------------------------------------------------;MODULE VIRTUAL_REGISTERSPUBLIC ?B0PUBLIC ?V0PUBLIC ?V1PUBLIC ?V2PUBLIC ?V3PUBLIC ?V4PUBLIC ?V5PUBLIC ?V6PUBLIC ?V7PUBLIC ?V8PUBLIC ?V9PUBLIC ?V10PUBLIC ?V11PUBLIC ?V12PUBLIC ?V13PUBLIC ?V14PUBLIC ?V15PUBLIC ?V16PUBLIC ?V17PUBLIC ?V18PUBLIC ?V19PUBLIC ?V20PUBLIC ?V21PUBLIC ?V22PUBLIC ?V23PUBLIC ?V24PUBLIC ?V25PUBLIC ?V26PUBLIC ?V27PUBLIC ?V28PUBLIC ?V29PUBLIC ?V30PUBLIC ?V31PUBLIC ?PSPPUBLIC ?XSPRSEG BREG:BIT:NOROOT?B0:DS 8RSEG VREG:DATA:NOROOT
?V0:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V0
?V1:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V1
?V2:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V2
?V3:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V3
?V4:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V4
?V5:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V5
?V6:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V6
?V7:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V7
?V8:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V8
?V9:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V9
?V10:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V10
?V11:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V11
?V12:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V12
?V13:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V13
?V14:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V14
?V15:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V15
?V16:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V16
?V17:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V17
?V18:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V18
?V19:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V19
?V20:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V20
?V21:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V21
?V22:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V22
?V23:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V23
?V24:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V24
?V25:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V25
?V26:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V26
?V27:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V27
?V28:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V28
?V29:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V29
?V30:DS 1RSEG VREG:DATA:NOROOTREQUIRE ?V30
?V31:DS 1RSEG PSP:DATA:NOROOTEXTERN ?RESET_PSPREQUIRE ?RESET_PSP
?PSP:DS 1RSEG XSP:DATA:NOROOTEXTERN ?RESET_XSPREQUIRE ?RESET_XSP
?XSP:DS 2ENDMOD ; VIRTUAL_REGISTERS;----------------------------------------------------------------;
; Register banks ;
; ================= ;
; Below is some segment needed for the IAR ICC C/EC++ compiler ;
; ;
; The register banks will only be included if the #pragma ;
; register_bank is used for the corresponding register bank ;
; ;
;----------------------------------------------------------------;MODULE REGISTER_BANK0PUBLIC __REG_BANK_0ASEGN __REG_BANK0:DATA,0x00__REG_BANK_0:DS 8ENDMODMODULE REGISTER_BANK1PUBLIC __REG_BANK_1ASEGN __REG_BANK1:DATA,0x08
__REG_BANK_1:DS 8ENDMODMODULE REGISTER_BANK2PUBLIC __REG_BANK_2ASEGN __REG_BANK2:DATA,0x10
__REG_BANK_2:DS 8ENDMODMODULE REGISTER_BANK3PUBLIC __REG_BANK_3ASEGN __REG_BANK3:DATA,0x18
__REG_BANK_3:DS 8ENDMOD ; REGISTER_BANK3END
