28335之SCI模块
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1.介紹
? ? TMS320F28335內(nèi)部有三個SCI模塊，SCIA、SCIB、SCIC。
? ? 每一個SCI模塊都有一個接收器和發(fā)送器，SCI的接收器和發(fā)送器各有一個16級的FIFO(First In First Out先入先出)隊列，它們都還有自己獨立的使能位和中斷位；可以工作在半雙工或全雙工模式；
? ? 串行通信的三種方式：
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2.SCI深入
? ??A.?GPIO的管腳對應如下:
??SCIA對應GPIO28/29和GPIO35/36兩組可選；
? SCIB有四組管腳可以選擇，分別是 O9/11,GPIO14/15,GPIO18/19,GPIO22/23；
? SCIC對應的是GPIO62/63。
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? ? 在編程初始化時，需要先將對應的GPIO管腳配置為SCI模式，才能使得這些管腳具有SCI功能；
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? ? B. SCI通信中帶有格式信息的數(shù)據(jù)字符叫幀，下面是典型的數(shù)據(jù)幀格式
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? ? C. 下面單獨介紹一下SCI波特率設置寄存器SCIHBAUD和SCILBAUD，0-15是高字節(jié)與低字節(jié)連在一起，構(gòu)成16位波特率設置寄存器BRR。
? ? BRR = SCIHBAUD + SCILBAUD
? ? 如果1<= BRR <=65535，那么SCI波特率=LSPCLK / ( (BRR+1) * 8 )，由此，可以帶入你需要的波特率，既可以得到BRR的值；
? ? 如果BRR = 0，那么SCI波特率=LSPCLK/ 16
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? ?D. SCI模塊發(fā)送和接受數(shù)據(jù)的原理：
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3.SCI串口編程
? ?A.先初始化IO管腳?(以SCI-A為例，SCI-B、SCI-C的初始化方法一樣，就是照著改對應的管腳就行)
void InitSciaGpio() //初始化SCIA的GPIO管腳為例子
{
EALLOW;
//根據(jù)硬件設計決定采用GPIO28/29和GPIO35/36中的哪一組。這里以35/36為例
//定義管腳為上拉
GpioCtrlRegs.GPBPUD.bit.GPIO36 = 0;
GpioCtrlRegs.GPBPUD.bit.GPIO35 = 0;
//定義管腳為異步輸入
GpioCtrlRegs.GPBQSEL1.bit.GPIO36 = 3;
//配置管腳為SCI功能管腳
GpioCtrlRegs.GPBMUX1.bit.GPIO36 = 1;
GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 1;
EDIS;
}
? ?B.SCI初始化配置
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void scia_init()
{
SciaRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
// No parity,8 char bits,
// async mode, idle-line protocol
SciaRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
SciaRegs.SCICTL2.bit.TXINTENA =1; //發(fā)送中斷使能
SciaRegs.SCICTL2.bit.RXBKINTENA =1;//接收中斷使能
SciaRegs.SCIHBAUD =0x0001; // 9600 baud @LSPCLK = 37.5MHz.
SciaRegs.SCILBAUD =0x00E7;
SciaRegs.SCICTL1.all =0x0023; // Relinquish SCI from Reset
}
???C.接著進行中斷的配置
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EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.SCIRXINTA = &sciaRxIsr;
PieVectTable.SCITXINTA = &sciaTxIsr;
PieVectTable.SCIRXINTB = &scibRxIsr;
PieVectTable.SCITXINTB = &scibTxIsr;
EDIS; // This is needed to disable write to EALLOW protected registers
? ???D.上面是將SCIA和SCIB的中斷服務程序連到PIE的中斷表中，發(fā)生中斷就會跑到你的ISR去了，下面是開中斷：
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PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
PieCtrlRegs.PIEIER9.bit.INTx1=1; // PIE Group 9, int1
PieCtrlRegs.PIEIER9.bit.INTx2=1; // PIE Group 9, INT2
PieCtrlRegs.PIEIER9.bit.INTx3=1; // PIE Group 9, INT3
PieCtrlRegs.PIEIER9.bit.INTx4=1; // PIE Group 9, INT4
IER = 0x100; // Enable CPU INT
EINT;
? ? 這樣串口基本就OK了。
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上面的配置是配置典型的串口中斷程序；
下面是一個SCI例程：
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/*
* Serial.c
*
* Created on: 2014-12-8
* Author: SCOTT
*/
#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
#include "DSP2833x_Examples.h" // CPU_FRQ_100MHZ is in it!
void scib_fifo_init()
{
ScibRegs.SCIFFTX.all = 0xe040;
ScibRegs.SCIFFRX.all = 0x204f;
ScibRegs.SCIFFCT.all = 0x0;
}
/*
void scib_echoback_init()
{
ScibRegs.SCICCR.all = 0x0007; // one stop bit,8 data bit,No parity, No Lookback
ScibRegs.SCICTL1.all = 0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
ScibRegs.SCICTL2.all =0x0003;
ScibRegs.SCICTL2.bit.TXINTENA = 1; // TX interrupt enable
ScibRegs.SCICTL2.bit.RXBKINTENA =1;
#if (CPU_FRQ_150MHZ)
ScibRegs.SCIHBAUD =0x0001; // 9600 baud @LSPCLK = 37.5MHz. 150/4 = 37.5MHZ
ScibRegs.SCILBAUD =0x00E7;
#endif
#if (CPU_FRQ_100MHZ)
ScibRegs.SCIHBAUD =0x0001; // 9600 baud @LSPCLK = 20MHz.
ScibRegs.SCILBAUD =0x0044;
#endif
ScibRegs.SCICTL1.all =0x0023; // Relinquish SCI from Reset
}
*/
void scib_echoback_init()
{
ScibRegs.SCICCR.all = 0x0007; // one stop bit,8 data bit,No parity, No Lookback
ScibRegs.SCICTL1.all = 0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
ScibRegs.SCICTL2.all =0x0003; // RX TX Interrupt enable
ScibRegs.SCICTL2.bit.TXINTENA = 1; // TX interrupt enable
ScibRegs.SCICTL2.bit.RXBKINTENA =1; // RX interrupt enable
#if (CPU_FRQ_150MHZ)
ScibRegs.SCIHBAUD =0x0001; // 9600 baud @LSPCLK = 37.5MHz. 150/4 = 37.5MHZ
ScibRegs.SCILBAUD =0x00E7;
#endif
#if (CPU_FRQ_100MHZ)
ScibRegs.SCIHBAUD =0x0001; // 9600 baud @LSPCLK = 20MHz.
ScibRegs.SCILBAUD =0x0044;
#endif
ScibRegs.SCIFFTX.all = 0xC020;
ScibRegs.SCIFFRX.all = 0x0021; // Receive FIFO generates interrupt when the FIFO status bits (RXFFST4–0) and FIFO level bits
//(RXFFIL4–0) match (i.e., are greater than or equal to). Default value of these bits after reset //–11111. This will avoid frequent interrupts, after reset, as the receive FIFO will be empty mos // t of the time.
ScibRegs.SCIFFCT.all = 0x00;
ScibRegs.SCIFFTX.bit.TXFIFOXRESET=1;
ScibRegs.SCIFFRX.bit.RXFIFORESET=1;
ScibRegs.SCICTL1.all =0x0023; // Relinquish SCI from Reset
}
void scib_xmit(int c)
{
//while (ScicRegs.SCIFFTX.bit.TXFFST != 0) {} //==0 -> transmit BUF is empty,can receive new data
while(ScibRegs.SCICTL2.bit.TXRDY != 1){} //also right,but the way of tool's display is different
ScibRegs.SCITXBUF = c;
}
void scib_msg(char *msg)
{
int i;
i = 0;
while('\0' != msg[i])
{
scib_xmit(msg[i]);
i++;
}
}
Uint16 scib_rvc()
{
Uint16 data = 0x0000;
while(ScibRegs.SCIFFRX.bit.RXFFST == 0){}
data = ScibRegs.SCIRXBUF.all;
while(ScibRegs.SCICTL2.bit.TXRDY != 1){}
ScibRegs.SCITXBUF = (data & 0xff);
return data;
}
/*No More*/
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