Optee異常向量表

• • • • ARMV8-aarch64
      • • 1、optee中定義的異常向量表
        • 2、optee中設(shè)置向量表基地址VBAR_EL1
      • ARMV8-aarch32、ARMV7-aarch32
      • • 1、optee中定義的異常向量表
        • 2、optee中設(shè)置向量表基地址VBAR_EL1

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分析optee中的向量表，我們主要看兩件事：

• 軟件中定義的向量表，是否和ARM文檔中的向量offset一致
• 向量表的基地址是否寫入到了VBAR寄存器

ARMV8-aarch64

1、optee中定義的異常向量表

(core/arch/arm/kernel/thread_a64.S).section .text.thread_excp_vect.align 11, INV_INSN FUNC thread_excp_vect , :/* -----------------------------------------------------* EL1 with SP0 : 0x0 - 0x180* -----------------------------------------------------*/.align 7, INV_INSN el1_sync_sp0:store_xregs sp, THREAD_CORE_LOCAL_X0, 0, 3b el1_sync_abortcheck_vector_size el1_sync_sp0.align 7, INV_INSN el1_irq_sp0:store_xregs sp, THREAD_CORE_LOCAL_X0, 0, 3b elx_irqcheck_vector_size el1_irq_sp0.align 7, INV_INSN el1_fiq_sp0:store_xregs sp, THREAD_CORE_LOCAL_X0, 0, 3b elx_fiqcheck_vector_size el1_fiq_sp0.align 7, INV_INSN el1_serror_sp0:b el1_serror_sp0check_vector_size el1_serror_sp0/* -----------------------------------------------------* Current EL with SP1: 0x200 - 0x380* -----------------------------------------------------*/.align 7, INV_INSN el1_sync_sp1:b el1_sync_sp1check_vector_size el1_sync_sp1.align 7, INV_INSN el1_irq_sp1:b el1_irq_sp1check_vector_size el1_irq_sp1.align 7, INV_INSN el1_fiq_sp1:b el1_fiq_sp1check_vector_size el1_fiq_sp1.align 7, INV_INSN el1_serror_sp1:b el1_serror_sp1check_vector_size el1_serror_sp1/* -----------------------------------------------------* Lower EL using AArch64 : 0x400 - 0x580* -----------------------------------------------------*/.align 7, INV_INSN el0_sync_a64:restore_mappingmrs x2, esr_el1mrs x3, sp_el0lsr x2, x2, #ESR_EC_SHIFTcmp x2, #ESR_EC_AARCH64_SVCb.eq el0_svcb el0_sync_abortcheck_vector_size el0_sync_a64.align 7, INV_INSN el0_irq_a64:restore_mappingb elx_irqcheck_vector_size el0_irq_a64.align 7, INV_INSN el0_fiq_a64:restore_mappingb elx_fiqcheck_vector_size el0_fiq_a64.align 7, INV_INSN el0_serror_a64:b el0_serror_a64check_vector_size el0_serror_a64/* -----------------------------------------------------* Lower EL using AArch32 : 0x0 - 0x180* -----------------------------------------------------*/.align 7, INV_INSN el0_sync_a32:restore_mappingmrs x2, esr_el1mrs x3, sp_el0lsr x2, x2, #ESR_EC_SHIFTcmp x2, #ESR_EC_AARCH32_SVCb.eq el0_svcb el0_sync_abortcheck_vector_size el0_sync_a32.align 7, INV_INSN el0_irq_a32:restore_mappingb elx_irqcheck_vector_size el0_irq_a32.align 7, INV_INSN el0_fiq_a32:restore_mappingb elx_fiqcheck_vector_size el0_fiq_a32.align 7, INV_INSN el0_serror_a32:b el0_serror_a32check_vector_size el0_serror_a32

align 7，對(duì)齊方式為7,也就是0x80對(duì)齊，恰好符合armv7-aarch64中文檔中的向量表的offset偏移

2、optee中設(shè)置向量表基地址VBAR_EL1

get_excp_vect()函數(shù)獲取到thread_a64.S中定義的向量表thread_excp_vect地址

(core/arch/arm/kernel/thread.c) static vaddr_t get_excp_vect(void) { #ifdef CFG_CORE_WORKAROUND_SPECTRE_BP_SECuint32_t midr = read_midr();if (get_midr_implementer(midr) != MIDR_IMPLEMENTER_ARM)return (vaddr_t)thread_excp_vect;switch (get_midr_primary_part(midr)) { #ifdef ARM32case CORTEX_A8_PART_NUM:case CORTEX_A9_PART_NUM:case CORTEX_A17_PART_NUM: #endifcase CORTEX_A57_PART_NUM:case CORTEX_A72_PART_NUM:case CORTEX_A73_PART_NUM:case CORTEX_A75_PART_NUM:return select_vector((vaddr_t)thread_excp_vect_workaround); #ifdef ARM32case CORTEX_A15_PART_NUM:return select_vector((vaddr_t)thread_excp_vect_workaround_a15); #endifdefault:return (vaddr_t)thread_excp_vect;} #endif /*CFG_CORE_WORKAROUND_SPECTRE_BP_SEC*/return (vaddr_t)thread_excp_vect; }

在thread_init_per_cpu()時(shí)，將向量表基地址寫入到VBAR_EL1

void thread_init_per_cpu(void) {size_t pos = get_core_pos();struct thread_core_local *l = thread_get_core_local();init_sec_mon(pos);set_tmp_stack(l, GET_STACK(stack_tmp[pos]) - STACK_TMP_OFFS);set_abt_stack(l, GET_STACK(stack_abt[pos]));thread_init_vbar(get_excp_vect()); }

thread_init_vbar函數(shù)完成將基地址寫入VBAR_EL1(將參數(shù)1寫入到VBAR_EL1)

(core/arch/arm/kernel/thread_a64.S) FUNC thread_init_vbar , :msr vbar_el1, x0 ret END_FUNC thread_init_vbar

ARMV8-aarch32、ARMV7-aarch32

1、optee中定義的異常向量表

(core/arch/arm/kernel/thread_a32.S).section .text.thread_excp_vect.align 5 FUNC thread_excp_vect , : UNWIND( .fnstart) UNWIND( .cantunwind)b . /* Reset */b thread_und_handler /* Undefined instruction */b thread_svc_handler /* System call */b thread_pabort_handler /* Prefetch abort */b thread_dabort_handler /* Data abort */b . /* Reserved */b thread_irq_handler /* IRQ */b thread_fiq_handler /* FIQ */

一條指令占4個(gè)字節(jié)，所以這里也是和aarch32的異常向量表的offset一一對(duì)應(yīng)的

2、optee中設(shè)置向量表基地址VBAR_EL1

其流程同aarch64的流程相同，都是thread_init_per_cpu()---->thread_init_vbar ()

(core/arch/arm/kernel/thread_a32.S) FUNC thread_init_vbar , : UNWIND( .fnstart)/* Set vector (VBAR) */write_vbar r0bx lr UNWIND( .fnend) END_FUNC thread_init_vbar

總結(jié)

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