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LPC43xx SGPIO Pattern Match Mode

發(fā)布時(shí)間:2025/5/22 编程问答 20 豆豆
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模式匹配

所有位串均具有模式匹配功能。

該功能可用于檢測(cè)啟動(dòng)代碼等。要使用該功能,則必須用需匹配的模式來(lái)對(duì)REG_SS 編程

(請(qǐng)注意, POS 達(dá)到零時(shí) REG_SS 不會(huì)與 REG ?交換!)

MATCH_MODE 位必須設(shè)為1。

輸入數(shù)據(jù) REG 現(xiàn)在與已編程的模式 REG_SS 相比較。發(fā)現(xiàn)匹配時(shí)會(huì)提出模式匹配中斷。

Bit MATCH_MODE selects whether the match filter is active or whether data is captured.

Only slice A, H, I, and P support matching with a mask (register MASK_x).

For other slices?the pattern is not masked.

匹配掩碼

四個(gè)位串(A、H、I 和P)同樣支持對(duì)模式的掩碼;必須設(shè)置MASK_x 以便對(duì)模式位進(jìn)行比較(‘1’表示比較)。

例如,尋找模式0x1234.xxxx.5678.9ABC 時(shí),

REG 應(yīng)設(shè)置為0x1234.xxxx.5678.9ABC,

MASK 設(shè)置為0xFFFF.0000.FFFF.FFFF。

When using the data match interrupt bit 0 has to be high.

When using data match mode, the slice’s shadow register [ REG_SS ]?should hold the pattern to be matched.

In addition, when data match is enabled the main register [ REG ] and the shadow register [?REG_SS ] will not exchange when FIFO is done with input or output data.

Pattern match

All slices feature pattern match functionality.

This can be used for example to detect a?start code.

To use this functionality, REG_SS must be programmed with the pattern to be?matched
(Note that REG_SS will not be swapped with REG when POS reaches zero!).

The MATCH_MODE bit must be set to 1.

The input data is now compared to the?programmed pattern.

When a match is found the pattern match interrupt is raised.

Four slices (A, H, I and P) also support masking the pattern; MASK_x must be set for the?pattern bits to be compared (1 is compare).

E.g. when looking for pattern?0x1234 XXXX,?then REG_SS should be set to 0x1234 XXXX and MASK to 0xFFFF 0000.

0x1234 xxxx -- REG 0x1234 0000 -- REG_SS 0xFFFF 0000 -- MASK

MASK_A, MASK_H, MASK_I, MASK_P

The mask registers are used for the “on pattern match” interrupts.

With some slices it is possible to mask the data for the pattern match interrupts. Slices A, H, I and P support this function.

Every bit that is 1 in this register will be masked.

If this register contains the value 0b00001111 the first 4 bits will be masked for the pattern interrupt.

轉(zhuǎn)載于:https://www.cnblogs.com/shangdawei/p/4905913.html

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