1. 在調試imx307 效果的時候，預覽圖像的時候始終有些輕微抖動，后面發現是camera是時鐘不對。

imx307要求是時鐘是37.125M，設置的時鐘也是37.125M，而平臺分出來是時鐘確只有35.5M，沒有37.125M，需要打補丁。

PLL_NPLL分頻cif clk out 37.125M補丁如下：

diff --git a/kernel/arch/arm/boot/dts/rk3288.dtsi b/kernel/arch/arm/boot/dts/rk3288.dtsi index 38cda53..ffaf5c3 100755 --- a/kernel/arch/arm/boot/dts/rk3288.dtsi +++ b/kernel/arch/arm/boot/dts/rk3288.dtsi @@ -1195,6 +1195,10 @@compatible = "rockchip,rk3288-isp", "rockchip,isp";reg = <0x0 0xff910000 0x0 0x4000>;interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + //start for camera IMX307 mclk "sclk_vip_out" set 37.125M by lpz add + assigned-clocks = <&cru PLL_NPLL>, <&cru SCLK_VIP_SRC>, <&cru SCLK_VIP_OUT>; + assigned-clock-rates = <594000000>, <594000000>, <37125000>; + //end for camera IMX307 mclk "sclk_vip_out" set 37.125M by lpz addpower-domains = <&power RK3288_PD_VIO>;clocks =<&cru ACLK_ISP>, <&cru HCLK_ISP>, <&cru SCLK_ISP>, diff --git a/kernel/drivers/clk/rockchip/clk-rk3288.c b/kernel/drivers/clk/rockchip/clk-rk3288.c index b0168c7..4763030 100755 --- a/kernel/drivers/clk/rockchip/clk-rk3288.c +++ b/kernel/drivers/clk/rockchip/clk-rk3288.c @@ -469,7 +469,10 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {RK3288_CLKSEL_CON(42), 14, 2, MFLAGS, 8, 5, DFLAGS,RK3288_CLKGATE_CON(13), 15, GFLAGS),- COMPOSITE_NODIV(0, "vip_src", mux_pll_src_cpll_gpll_p, 0, + //start for camera IMX307 mclk "sclk_vip_out" set 37.125M by lpz add + //COMPOSITE_NODIV(0, "vip_src", mux_pll_src_cpll_gpll_p, 0, + COMPOSITE_NODIV(SCLK_VIP_SRC, "vip_src", mux_pll_src_cpll_gpll_p, 0, + //end for camera IMX307 mclk "sclk_vip_out" set 37.125M by lpz addRK3288_CLKSEL_CON(26), 8, 1, MFLAGS,RK3288_CLKGATE_CON(3), 7, GFLAGS),COMPOSITE_NOGATE(SCLK_VIP_OUT, "sclk_vip_out", mux_vip_out_p, 0, diff --git a/kernel/drivers/media/video/rk_camsys/camsys_cif.c b/kernel/drivers/media/video/rk_camsys/camsys_cif.c old mode 100644 new mode 100755 index fce0784..a597ea6 --- a/kernel/drivers/media/video/rk_camsys/camsys_cif.c +++ b/kernel/drivers/media/video/rk_camsys/camsys_cif.c @@ -148,7 +148,9 @@ static int camsys_cif_clkout_cb(void *ptr, unsigned int on, unsigned int clkin)spin_lock(&clk->lock);if (on && (clk->out_on != on)) {clk_prepare_enable(clk->cif_clk_out); - clk_set_rate(clk->cif_clk_out, clkin); + //start for camera IMX307 mclk "sclk_vip_out" set 37.125M by lpz add + //clk_set_rate(clk->cif_clk_out, clkin); + //end for camera IMX307 mclk "sclk_vip_out" set 37.125M by lpz addclk->out_on = on;camsys_trace(1, "%s clock out(rate: %dHz) turn on", diff --git a/kernel/drivers/media/video/rk_camsys/camsys_marvin.c b/kernel/drivers/media/video/rk_camsys/camsys_marvin.c old mode 100644 new mode 100755 index bef1dc1..cfe2974 --- a/kernel/drivers/media/video/rk_camsys/camsys_marvin.c +++ b/kernel/drivers/media/video/rk_camsys/camsys_marvin.c @@ -683,7 +683,9 @@ static int camsys_mrv_clkout_cb(void *ptr, unsigned int on, unsigned int inclk)mutex_lock(&clk->lock);if (on && (clk->out_on != on)) { - clk_set_rate(clk->cif_clk_out, inclk); + //start for camera IMX307 mclk "sclk_vip_out" set 37.125M by lpz add + //clk_set_rate(clk->cif_clk_out, inclk); + //end for camera IMX307 mclk "sclk_vip_out" set 37.125M by lpz addclk_prepare_enable(clk->cif_clk_out);clk->out_on = on;camsys_trace(1, "%s clock out(rate: %dHz) turn on", diff --git a/kernel/include/dt-bindings/clock/rk3288-cru.h b/kernel/include/dt-bindings/clock/rk3288-cru.h old mode 100644 new mode 100755 index 6cb872f..c4d55f0 --- a/kernel/include/dt-bindings/clock/rk3288-cru.h +++ b/kernel/include/dt-bindings/clock/rk3288-cru.h @@ -91,6 +91,7 @@#define SCLK_VIP_OUT 127#define SCLK_DDRCLK 128#define SCLK_I2S_SRC 129 +#define SCLK_VIP_SRC 135#define SCLK_MAC_PLL 150#define SCLK_MAC 151 (END)

打上補丁后imx307的mclk 37.125M正常了，預覽界面也不會有抖動了，顯示效果也得到了改善；

可以通過adb 查看clk是否正確：

cat ./sys/kernel/debug/clk/clk_summary |grep vip
? ? ? ? ? vip_src ? ? ? ? ? ? ? ? ? ? ? ? 1 ? ? ? ? ? ?1 ? 594000000 ? ? ? ? ?0 0
? ? ? ? ? ? ?sclk_vip_out ? ? ? ? ? ? ? ? 1 ? ? ? ? ? ?3 ? ?37125000 ? ? ? ? ?0 0

2. 但又出現了新的問題，打上補丁后，導致100M以太網無法使用了。我們用100M以太網是由rk3288提供分頻50M，

以太網50M是由PLL_NPLL分出來了，PLL_NPLL默認是500M，是可以正常分出50M的。

但是打上cif clk 37.125M補丁后，NPLL改成594M后，無法分出50M了，導致100M以太網無法使用了。

問題找到了，但兩個問題是沖突的，二者只能取其一，母時鐘還是不能亂動的，一動其他孩子可能就要斷奶了。

只能找其他方法了，把整個時鐘樹列出來發現GPLL默認時鐘就是594M，于是我們可以選著GPLL作為sclk_vip_out的母時鐘，

既能分出37.125M，又不用改母時鐘頻率，這樣camera IMX307和以太網都可以正常使用了，

補丁如下：

diff --git a/kernel/arch/arm/boot/dts/rk3288.dtsi b/kernel/arch/arm/boot/dts/rk3288.dtsi index ffaf5c3..a025a91 100755 --- a/kernel/arch/arm/boot/dts/rk3288.dtsi +++ b/kernel/arch/arm/boot/dts/rk3288.dtsi @@ -1196,7 +1196,7 @@reg = <0x0 0xff910000 0x0 0x4000>;interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;//start for camera IMX307 mclk "sclk_vip_out" set 37.125M by lpz add - assigned-clocks = <&cru PLL_NPLL>, <&cru SCLK_VIP_SRC>, <&cru SCLK_VIP_OUT>; + assigned-clocks = <&cru PLL_GPLL>, <&cru SCLK_VIP_SRC>, <&cru SCLK_VIP_OUT>;assigned-clock-rates = <594000000>, <594000000>, <37125000>;//end for camera IMX307 mclk "sclk_vip_out" set 37.125M by lpz addpower-domains = <&power RK3288_PD_VIO>;

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